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ISPPAC-CLK5620AV-01TN100C

Lattice Semiconductor Corporation
RoHS
RoHS RoHS compliant
Package 100-LQFP
Category Clock/Timing - Clock Generators, PLLs, Frequency Synthesizers / Clock/Timing - Clock Generators, PLLs, Frequency Synthesizers
Description HSTL LVCMOS LVDS LVPECL LVTTL SSTL 100-LQFP ISPPAC-CLK5620A PLL BASED CLOCK DRIVER clock generator circuit 3.6V 400MHz 7mA 1.75W
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Inventory: 3527
Minimum: 1
Total Price: USD $29
Unit Price: USD $28.9959
≥1 USD $28.9959
≥10 USD $23.7918
≥100 USD $23.04795
≥500 USD $22.30505
≥1000 USD $21.5612

Technical Details

Supply Chain

Factory Lead Time 8 Weeks

Physical

Mount Surface Mount
Mounting Type Surface Mount
Package / Case 100-LQFP
Number of Pins 100

Compliance

Radiation Hardening No
RoHS Status ROHS3 Compliant
Lead Free Lead Free

Technical

Operating Temperature 0°C~70°C
Packaging Tray
Published 2000
Series ispClock?
JESD-609 Code e3
Pbfree Code yes
Part Status Obsolete
Moisture Sensitivity Level (MSL) 3 (168 Hours)
Number of Terminations 100
ECCN Code EAR99
Terminal Finish Matte Tin (Sn)
Subcategory Clock Drivers
Max Power Dissipation 1.75W
Voltage - Supply 3V~3.6V
Terminal Position QUAD
Terminal Form GULL WING
Peak Reflow Temperature (Cel) 260
Number of Functions 1
Supply Voltage 3.3V
Terminal Pitch 0.5mm
Frequency 20MHz
Time@Peak Reflow Temperature-Max (s) 40
Base Part Number ISPPAC-CLK5620A
Output EHSTL, HSTL, LVCMOS, LVDS, LVPECL, LVTTL, SSTL
Pin Count 100
Number of Outputs 20
Operating Supply Voltage 3.3V
Supply Voltage-Max (Vsup) 3.6V
Supply Voltage-Min (Vsup) 3V
Number of Circuits 1
Nominal Supply Current 7mA
Frequency (Max) 400MHz
Family 5600
Input HSTL, LVCMOS, LVDS, LVPECL, LVTTL, SSTL
Ratio - Input:Output 2:20
Logic IC Type PLL BASED CLOCK DRIVER
PLL Yes with Bypass
Differential - Input:Output Yes/Yes
Propagation Delay (tpd) 8.8 ns
Divider/Multiplier Yes/No
fmax-Min 400 MHz
Same Edge Skew-Max (tskwd) 0.05 ns

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