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74AUP2G06GN,132

Nexperia USA Inc.
RoHS
RoHS RoHS compliant
Package 6-XFDFN
Category Logic - Gates and Inverters / Logic - Gates and Inverters
Description Buffer Inverter 74AUP2G06 e3 74AUP logic gate circuit 10.5ns @ 3.3V 30pF 0.35mm - 4mA 1.6V-2V
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Inventory: 5291
Minimum: 1
Total Price: USD $0.26
Unit Price: USD $0.264454
≥1 USD $0.264454
≥10 USD $0.249485
≥100 USD $0.235363
≥500 USD $0.222039
≥1000 USD $0.209468

Technical Details

Supply Chain

Factory Lead Time 13 Weeks

Technical

Operating Temperature -40°C~125°C
Packaging Tape & Reel (TR)
Published 2010
Series 74AUP
JESD-609 Code e3
Feature Open Drain
Part Status Active
Moisture Sensitivity Level (MSL) 1 (Unlimited)
Number of Terminations 6
Terminal Finish Tin (Sn)
Technology CMOS
Voltage - Supply 0.8V~3.6V
Terminal Position DUAL
Number of Functions 2
Supply Voltage 1.1V
Terminal Pitch 0.3mm
Base Part Number 74AUP2G06
Pin Count 6
Number of Elements 2
Polarity Inverting
Supply Voltage-Min (Vsup) 0.8V
Propagation Delay 21.3 ns
Quiescent Current 500nA
Turn On Delay Time 21.3 ns
Family AUP/ULP/V
Logic Function Buffer, Inverter
Current - Output High, Low - 4mA
Logic Type Inverter
Max Propagation Delay @ V, Max CL 10.5ns @ 3.3V, 30pF
Logic Level - Low 0.7V ~ 0.9V
Logic Level - High 1.6V ~ 2V

Physical

Mount Surface Mount
Mounting Type Surface Mount
Package / Case 6-XFDFN
Number of Pins 6

Dimensions

Height Seated (Max) 0.35mm
Length 1mm
Width 0.9mm

Compliance

Radiation Hardening No
RoHS Status ROHS3 Compliant
Lead Free Lead Free

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