Operating Temperature 0°C~85°C TJ
Packaging Tray
Series Arria V SX
JESD-609 Code e1
Part Status Obsolete
Moisture Sensitivity Level (MSL) 3 (168 Hours)
Terminal Finish Tin/Silver/Copper (Sn/Ag/Cu)
HTS Code 8542.39.00.01
Subcategory Field Programmable Gate Arrays
Technology CMOS
Terminal Position BOTTOM
Terminal Form BALL
Peak Reflow Temperature (Cel) NOT SPECIFIED
Supply Voltage 1.1V
Terminal Pitch 1mm
Reach Compliance Code compliant
Time@Peak Reflow Temperature-Max (s) NOT SPECIFIED
Base Part Number 5ASXFB5
JESD-30 Code S-PBGA-B1152
Number of Outputs 350
Qualification Status Not Qualified
Supply Voltage-Max (Vsup) 1.13V
Power Supplies 1.11.2/3.32.5V
Supply Voltage-Min (Vsup) 1.07V
Number of I/O MCU - 208, FPGA - 385
Speed 700MHz
RAM Size 64KB
Core Processor Dual ARM? Cortex?-A9 MPCore? with CoreSight?
Peripherals DMA, POR, WDT
Clock Frequency 500MHz
Connectivity EBI/EMI, Ethernet, I2C, MMC/SD/SDIO, SPI, UART/USART, USB OTG
Architecture MCU, FPGA
Number of Inputs 350
Programmable Logic Type FIELD PROGRAMMABLE GATE ARRAY
Primary Attributes FPGA - 462K Logic Elements
Number of Logic Cells 420000