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74AUP2G04GM,115
Nexperia USA Inc.RoHS 
RoHS compliant
RoHS compliantPackage 6-XFDFN
Category Logic - Gates and Inverters / Logic - Gates and Inverters
Description
Buffer Inverter 74AUP2G04 e3 74AUP logic gate circuit 5.4ns @ 3.3V 30pF 0.5mm 4mA 4mA 1.6V-2V
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Inventory: 2515
Minimum: 1
Total Price: USD $0.3
Unit Price: USD $0.300418
≥1 USD $0.300418
≥200 USD $0.116257
≥500 USD $0.112174
≥1000 USD $0.110153
Technical Details
Supply Chain
Factory Lead Time 13 Weeks
Physical
Contact Plating Tin
Mount Surface Mount
Mounting Type Surface Mount
Package / Case 6-XFDFN
Number of Pins 6
Technical
Operating Temperature -40°C~125°C
Packaging Tape & Reel (TR)
Published 2014
Series 74AUP
JESD-609 Code e3
Part Status Active
Moisture Sensitivity Level (MSL) 1 (Unlimited)
Number of Terminations 6
Technology CMOS
Voltage - Supply 0.8V~3.6V
Terminal Position DUAL
Peak Reflow Temperature (Cel) 260
Number of Functions 2
Supply Voltage 1.1V
Terminal Pitch 0.5mm
Time@Peak Reflow Temperature-Max (s) 30
Base Part Number 74AUP2G04
Pin Count 6
Supply Voltage-Min (Vsup) 0.8V
Number of Circuits 2
Propagation Delay 5.4 ns
Quiescent Current 500nA
Turn On Delay Time 20.9 ns
Family AUP/ULP/V
Logic Function Buffer, Inverter
Current - Output High, Low 4mA 4mA
Logic Type Inverter
Max Propagation Delay @ V, Max CL 5.4ns @ 3.3V, 30pF
Logic Level - Low 0.7V ~ 0.9V
Logic Level - High 1.6V ~ 2V
Dimensions
Height Seated (Max) 0.5mm
Length 1.45mm
Width 1mm
Compliance
Radiation Hardening No
RoHS Status ROHS3 Compliant
Lead Free Lead Free
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