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74LVC11BQ,115

Nexperia USA Inc.
RoHS
RoHS RoHS compliant
Package 14-VFQFN Exposed Pad
Category Logic - Gates and Inverters / Logic - Gates and Inverters
Description AND 74LVC11 e4 74LVC logic gate circuit 6.2ns @ 3.3V 50pF 0.5mm 24mA 24mA 1.08V-2V
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Inventory: 2855
Minimum: 5
Total Price: USD $0.42
Unit Price: USD $0.0836
≥5 USD $0.0836
≥50 USD $0.0684
≥150 USD $0.0665
≥500 USD $0.0646
≥3000 USD $0.06175
≥6000 USD $0.05605

Technical Details

Supply Chain

Factory Lead Time 8 Weeks

Physical

Contact Plating Gold
Mount Surface Mount
Mounting Type Surface Mount
Package / Case 14-VFQFN Exposed Pad
Number of Pins 14

Technical

Operating Temperature -40°C~125°C
Packaging Tape & Reel (TR)
Published 2010
Series 74LVC
JESD-609 Code e4
Part Status Active
Moisture Sensitivity Level (MSL) 1 (Unlimited)
Number of Terminations 14
Technology CMOS
Voltage - Supply 1.2V~3.6V
Terminal Position QUAD
Peak Reflow Temperature (Cel) 260
Number of Functions 3
Supply Voltage 2.7V
Terminal Pitch 0.5mm
Time@Peak Reflow Temperature-Max (s) 30
Base Part Number 74LVC11
Pin Count 14
Number of Outputs 1
Propagation Delay 2.5 ns
Quiescent Current 40μA
Turn On Delay Time 3.7 ns
Family LVC/LCX/Z
Logic Function AND
Current - Output High, Low 24mA 24mA
Logic Type AND Gate
Number of Gates 3
Max Propagation Delay @ V, Max CL 6.2ns @ 3.3V, 50pF
Logic Level - Low 0.12V ~ 0.8V
Logic Level - High 1.08V ~ 2V
Current - Quiescent (Max) 10μA

Dimensions

Width 2.5mm

Compliance

Radiation Hardening No
RoHS Status ROHS3 Compliant
Lead Free Lead Free

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